Design and Implementation of Multiplier-Free Dual-Mode CORDIC Based DDC

Abstract

Digital Down Conversion (DDC) is a fundamental process in software defined radio (SDR) and digital communications, which transforms intermediate frequency (IF) signals into baseband signals. In conventional DDC designs, multipliers and look-up tables are generally employed, both of which tend to increase hardware size and power consumption. In this paper we present a Dual-Mode CORDIC-Based DDC architecture which uses the CORDIC (Coordinate Rotation Digital Computer) algorithm to eliminate multipliers. This novel architecture combines a CORDIC-based Numerically Controlled Oscillator (NCO), a CORDIC mixer, and a Cascaded Integrator-Comb (CIC) filter with a finite impulse response (FIR) com pentation filter. The NCO provides two precision modes - an 8-stage low-latency mode for speed and a 16-stage high precision mode for accuracy, giving runtime reconfigurability according to design requirements. Simulations and analysis show that the design gives highly accurate frequency translation, is efficient in hardware utilization and fully eliminates the use of digital signal processing (DSP) blocks. Overall, the architecture proposed offers a low-power, low-cost, and recon figural solution ideal for modern SDR-based applications and flexible digital signal processing systems.